CS302 ASSIGNMENT NO. 2 SPRING 2022 || 100% RIGHT SOLUTION || DIGITAL LOGIC DESIGN || BY VuTech

CS302 ASSIGNMENT NO. 2 SPRING 2022

CS302 ASSIGNMENT NO. 2 SPRING 2022 || 100% RIGHT SOLUTION || DIGITAL LOGIC DESIGN || BY VuTech

Digital Logic Design (CS302)

Assignment # 02

Spring 2022

Total marks = 20 

Deadline

22^nd of Aug 2022

Please carefully read the following instructions before attempting the assignment. RULES FOR MARKING It should be clear that your assignment would not get any credit if: The assignment is submitted after the due date. The submitted assignment does not open or the file is corrupt. Strict action will be taken if the submitted solution is copied from any other student or the internet. You should consult the recommended books to clarify your concepts as handouts are not sufficient. You are supposed to submit your assignment in Doc or Docx format. Any other formats like scan images, PDF, ZIP, RAR, PPT, BMP, etc. will not be accepted. Topic Covered: ·         Multiplexer ·         Demultiplexer ·         The GAL16V8 ·         ABEL Programming Lecture # 15 till Lecture # 29

NOTE   No assignment will be accepted after the due date via email in any case (whether it is the case of load shedding or internet malfunctioning etc.). Hence refrain from uploading assignments in the last hour of the deadline. It is recommended to upload the solution file at least two days before its closing date.   If you people find any mistake or confusion in the assignment (Question statement), please consult with your instructor before the deadline. After the deadline, no queries will be entertained in this regard.   For any query, feel free to email at: cs302@vu.edu.pk

Question No 01                                                                                                                  Marks (20)

  

You are given a Customized PLA based device (Programming AND & Programmable XOR arrays) having 10 inputs and 3 outputs. You are required to perform the stated operations:

1.      Generate the basic Boolean Expression of the stated circuit.

2.      Convert the generated Boolean Expression into ABEL Expression.

 

Solution:

 

1.            Generate the basic Boolean Expression of the stated circuit.

1)   P₁  = I0 . 12 .  . I7 .

2)   P₂ =    . .  . I8

3)   P₃  =  I3 .  .I6 . I7 .

4)   P₄  = I1 .  . I5 . . I9

 

1)   OUT₀  = I0 . 12 .  . I7 .  ⊕ I3 .  .I6 . I7 .  ⊕ I1 .  . I5 . . I9

2)   OUT₁ =  I0 . 12 .  . I7 .  ⊕  . .  . I8 ⊕ I1 .  . I5 . . I9

3)   OUT₂ =  . .  . I8 ⊕ I3 .  .I6 . I7 .

 

2.            Convert the generated Boolean Expression into ABEL Expression.

 

1.                  OUT₀  = I0 & 12 & ! I4 & I7 & ! I9 $ I3 & ! I5 & I6 & I7 & ! I8 $ I1 & ! I2 & I5 & ! I6 & I9

2.                  OUT₁ =  I0 & 12 & ! I4 & I7 & ! I9 $ ! I1 & ! I3 & ! I7 & I8 $ I1 & ! I2 & I5 & ! I6 & I9

3.                  OUT₂ = ! I1 & ! I3 & ! I7 & I8 $ I3 & ! I5 & I6 & I7 & ! I8

 

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